Bài tập Thiết kế luận lý 1 - Chương 3: Logic gates and boolean algebra - Nguyễn Quang Huy

dce  
2011  
Exercise – Chapter 3  
BK  
TP.HCM  
dce 3.1  
2011  
• Draw the output waveform for the OR gate  
dce 3.2 + 3.3  
2011  
• A input is shorted to ground (A = 0)  
• A input is shorted to the +5 V (A = 1)  
dce 3.4  
2011  
• If the output waveform from an OR gate is the  
same as the waveform at one of its inputs, the  
other input is being held permanently LOW  
• If the output waveform from an OR gate is  
always HIGH, one of its inputs is being held  
permanently HIGH  
dce 3.5  
2011  
• How many different sets of input conditions will  
produce a HIGH output from a five-input OR  
gate?  
dce 3.7  
2011  
• The alarm is to be activated only when the  
pressure and the temperature exceed their  
mãimum limits at the same time ???  
dce 3.8  
2011  
• Draw the output waveform for the AND gate  
dce 3.9  
2011  
• Suppose that you have an unkown 2-input gate  
(AND or OR gate)  
• What combination of input levels should you  
apply to the gate’s inputs to determine which  
type of gate it is?  
dce 3.12 (a)  
2011  
• Boolean expression for output x  
• Draw the truth table  
• (A’ + B’)’.B.C  
dce 3.12 (b)  
2011  
• Boolean expression for output x  
dce 3.16  
2011  
• Construct the corresponding logic circuit, using  
AND and OR gates, and INVERTERs  
y = (M + N)’ + P’Q  
z = (A + B + C’DE’)’ + B’CD’  
dce 3.19  
2011  
• Boolean expression for the output x  
dce 3.22  
2011  
• Complete each expression  
A + 1 =  
A . A =  
B . B’ =  
C + C =  
x . 0 =  
D . 1 =  
D + 0 =  
C + C’ =  
G + GF =  
y + w’y =  
dce 3.24  
2011  
• Simplify the expression  
x = (M + N)(M’ + P)(N’ + P’)  
z = A’BC’ + ABC’ + BC’D  
dce 3.26  
2011  
• Simplify each of the following expressions using  
DeMorgan’s theorems  
(a) (A’BC’)’  
(b) (A(B + C’)’D)’  
(c) (A’ + C’ + D’)’  
(d) (((AB)’C)’D)’  
dce 3.28  
2011  
• Using only NAND gates, write the output  
expression  
dce 3.29  
2011  
• Using only NOR gates, write the output  
expression  
dce 3.30 + 3.31  
2011  
• A two-input NAND gate Æ two-input NOR gate  
• A two-input NOR gate Æ two-input NAND gate  
dce 3.32  
2011  
• Determine conditions will give a warning to the  
pilot (warning light is ON)  
dce 3.34  
2011  
• Select the appropriate logic-gate symbol  
A HIGH output occurs only when all 3 inputs are LOW  
A LOW output occurs only when any of the 4 inputs is LOW  
A LOW output occurs only when all 8 inputs are HIGH  
Tải về để xem bản đầy đủ
pdf 23 trang Thùy Anh 17540 Free
Bạn đang xem 20 trang mẫu của tài liệu "Bài tập Thiết kế luận lý 1 - Chương 3: Logic gates and boolean algebra - Nguyễn Quang Huy", để tải tài liệu gốc về máy hãy click vào nút Download ở trên

File đính kèm:

  • pdfbai_tap_thiet_ke_luan_ly_1_chuong_3_logic_gates_and_boolean.pdf