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Bài giảng Kiến trúc máy tính - Chương 1: Giới thiệu môn học - Võ Tấn Phương

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dce  
2015  
COMPUTER ARCHITECTURE  
CSE  
Faculty of Computer Science and Engineering  
Department of Computer Engineering  
BK  
TP.HCM  
Vo Tan Phuong  
http://www.cse.hcmut.edu.vn/~vtphuong  
dce  
2015  
Chapter 1  
Introduction  
Computer Architecture – Chapter 1  
© Fall 2015  
2
dce Presentation Outline  
2015  
• Welcome to CA CSE  
• Computer Architectures and Trends  
• High-Level, Assembly-, and Machine-Languages  
• Components of a Computer System  
• Chip Manufacturing Process  
• Programmer's View of a Computer System  
Computer Architecture – Chapter 1  
© Fall 2015  
3
dce Welcome to CA CSE  
2015  
• Instructor: Võ Tấn Phương  
Email: [email protected]  
• TA: Trần Thanh Bình  
Email: [email protected]  
• Course Web Page:  
– http://www.cse.hcmut.edu.vn/~vtphuong/KTMT  
Computer Architecture – Chapter 1  
© Fall 2015  
4
dce Which Textbook will be Used?  
2015  
• Computer Organization & Design:  
The Hardware/Software Interface  
– Fourth Edition  
– David Patterson and John Hennessy  
– Morgan Kaufmann Publishers, 2009  
• Read the textbook in addition to slides  
Computer Architecture – Chapter 1  
© Fall 2015  
5
dce Estimated Schedule  
2015  
• Introduction, Performance (1 week)  
• Integer arithmetic, Floating Point Numbers (1 week)  
• MIPS Instruction Set Architecture (3 weeks)  
• MIPS Assembly Programming (1 weeks)  
• Basic Digital Function Block, ALU (1 week)  
• Single Cycle MIPS Processor (2 weeks)  
• Pipelined MIPS Processor (2 weeks)  
• Memory System (1 week)  
• Cache Memory System (2 week)  
Computer Architecture – Chapter 1  
© Fall 2015  
6
dce Course Learning Outcomes  
2015  
• Towards the end of this course, you should be able to …  
– Describe the instruction set architecture of a MIPS processor  
– Analyze, write, and test MIPS assembly language programs  
– Design the datapath and control of a single-cycle CPU  
– Design the datapath/control of a pipelined CPU & handle hazards  
– Describe the organization/operation of memory and caches  
– Analyze the performance of processors and caches  
• Required Background  
– Ability to program confidently in Java or C  
– Ability to design a combinational and sequential circuit  
Computer Architecture – Chapter 1  
© Fall 2015  
7
dce Tentative Grading Policy  
2015  
• Labs & Assignment  
– MIPS assembly programming  
– Design simple CPU  
40%  
20%  
20%  
• Mid Exam  
30%  
– Quiz questions, opened book  
• Final Exam  
40%  
– Quiz questions, opened book  
• Bonus by white board quick exercises (max + 2)  
Computer Architecture – Chapter 1  
© Fall 2015  
8
dce Software Tools  
2015  
• MIPS Simulators  
– MARS: MIPS Assembly and Runtime Simulator  
• Runs MIPS-32 assembly language programs  
• Website: http://courses.missouristate.edu/KenVollmar/MARS/  
– SPIM  
• Also Runs MIPS-32 assembly language programs  
• Website: http://www.cs.wisc.edu/~larus/spim.html  
• Design simple CPU  
– NandToTetris  
• Link: http://www.nand2tetris.org/course.php  
Computer Architecture – Chapter 1  
© Fall 2015  
9
dce Presentation Outline  
2015  
• Welcome to CA CSE  
• Computer Architectures and Trends  
• High-Level, Assembly-, and Machine-Languages  
• Components of a Computer System  
• Chip Manufacturing Process  
• Programmer's View of a Computer System  
Computer Architecture – Chapter 1  
© Fall 2015  
10  
dce What is “Computer Architecture” ?  
2015  
• Computer Architecture =  
Instruction Set Architecture +  
Computer Organization  
• Instruction Set Architecture (ISA)  
– WHAT the computer does (logical view)  
• Computer Organization  
– HOW the ISA is implemented (physical view)  
• We will study both in this course  
Computer Architecture – Chapter 1  
© Fall 2015  
11  
dce Computer Architecture In Context  
2015  
Computer Architecture – Chapter 1  
© Fall 2015  
12  
dce  
2015  
Trend 1: Growing Diversity In Apps & Systems  
Computer Architecture – Chapter 1  
© Fall 2015  
13  
dce Trend 2: Software trend  
2015  
• No longer just executing C/FORTRAN code  
• Object Oriented Programming  
• Java  
• Architectural features to assist security  
• Middleware  
– Layer(s) between client and server applications  
– Hides complexity of client/server communications  
Computer Architecture – Chapter 1  
© Fall 2015  
14  
dce  
2015  
Trend 3: Energy/Power Constrain all Modern Systems  
Computer Architecture – Chapter 1  
© Fall 2015  
15  
dce Emerging Device Technologies  
2015  
Computer Architecture – Chapter 1  
© Fall 2015  
16  
dce  
2015  
Power Constrains Single-Processor Scaling  
Computer Architecture – Chapter 1  
© Fall 2015  
17  
dce  
2015  
Transition to Multicore Processors  
Computer Architecture – Chapter 1  
© Fall 2015  
18  
dce  
2015  
Multicore Performance Scaling  
Computer Architecture – Chapter 1  
© Fall 2015  
19  
dce Classes of Computers  
2015  
• Desktop / Notebook Computers  
– General purpose, variety of software  
– Subject to cost/performance tradeoff  
• Server Computers  
– Network based  
– High capacity, performance, reliability  
– Range from small servers to building sized  
• Embedded Computers  
– Hidden as components of systems  
– Stringent power/performance/cost constraints  
Computer Architecture – Chapter 1  
© Fall 2015  
20  
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